Giovanni V. Resta, PhD student, EPFL-IC-LSI (giovanni dot resta at epfl dot ch)
Giovanni De Micheli, Professor, EPFL-IC-LSI (giovanni dot demicheli at epfl dot ch)
The aggressive downscaling of silicon CMOS technology allowed the fabrication of low-power and high-performance field effect transistors (FETs) down to dimensions approaching the sub-10 nm regime. At these ultra-scaled dimensions short channel effects become more and more prominent, drastically degrading the performances of silicon FETs for sub-10 nm gate lengths. In order to restore the electrostatic control of the gate on the FET channel and reduce the penetration of the drain electric field in the channel, ultimate scaling of the semiconductor thickness down to atomic-scale dimensions becomes necessary. Recently significant interest has been shown for low-dimensional materials such as 1D nanotubes, quasi-1D nanowires and layered (2D) materials. Among this last category, transition metal dichalcogenides (TMDC) materials have proven to be viable candidates for the ultimate scaling of FETs. TMDC materials, among which the most famous are MoS2 and WSe2, have a general chemical formula such as MX2, where M is a transitional metal (W, Mo, Nb, Ta, Ti, Re) and X is a chalcogen (S, Se, Te). Thanks to tremendous development in the field in the past 10 years, single/multi-layer flakes can now be fabricated with standard techniques such as mechanical exfoliation (originally developed for graphene) or grown with chemical vapor deposition (CVD). TMDC FETs have already demonstrated excellent performances such as 108 ON/OFF current ratio with ON currents as high as 200 μA/μm, steep subthreshold swings near the 60 mV/dec limit, electron and hole mobilities > 100 cm2V-1s-1 and ambipolar behavior.
The aim of this PhD thesis is to explore TMDCs materials as viable candidates for post-silicon FETs technology. The project will be conducted in close collaboration with IMEC research center in Leuven (Belgium) where most part of the fabrication and characterization of the devices will be carried out. The final goal will be the development of ambipolar reconfigurable MX2 FETs and circuits with enhanced expressive logic power, innovative architectures and improved electrical characteristics respect to standard silicon CMOS technology.
The key to unlock the possibility of controlling the polarity of the transistor is the separate gating of different channel regions, thanks to a double-independent-gate (DIG) structure. By adding a second gate, i.e. polarity gate (PG), we are able to induce electrostatic doping at the contact interfaces and allow the injection of either electrons or holes. A conventional gate, named control gate (CG), acting in the central region of the channel, controls the ON/OFF state of the device. 2D semiconductors of the transition metal di-chalcogenide (TMDC) family have recently attracted the attention of the scientific community in view of their remarkable structural and electronic properties. When no physical or chemical doping is introduced, contact to a 2D semiconductor usually results in the creation of a Schottky barrier. Thus, the use of electrostatic doping, to reversibly select the polarity of the transistor, adapts perfectly to 2D materials, and provides a path for the realization of CMOS logic with the use of a single 2D ambipolar semiconductor. Amongst 2D TMDCs,WSe2 has shown high carrier mobility, ambipolar behavior and CMOS-like devices have been reported experimentally with chemical doping of the material. In this thesis project, we exploit the presence of Schottky barrier contacts in WSe2 to achieve dynamic control of the polarity of the transistors. For the first time, we experimentally demonstrated polarity-controllable behavior on WSe2 and fabricated a complete family of doping-free complementary logic gates. We also performed accurate quantum transport simulations to validate the device behavior at ultra-scaled gate lengths.
A complete list of publications is available here.
- Resta, G.V., Sutar, S., Balaji, Y., Lin, D., Raghavan, P., Radu, I., Catthoor, F., Thean, A., Gaillardon, P.E. and De Micheli, G., 2016. Polarity control in WSe2 double-gate transistors.Scientific Reports 6, p. 29448 (2016).
- Resta, G.V., Agarwal, T., Lin, D., Radu, I.P., Catthoor, F., Gaillardon, P.E. and De Micheli, G., 2017. Scaling trends and performance evaluation of 2-dimensional polarity-controllable FETs. Scientific Reports, 7, p.45556 (2017).
- Resta, G.V., Balaji, Y., Lin, D., Radu, I.P., Catthoor, F., Gaillardon, P.E. and De Micheli, G., 2018, June. Doping-free complementary inverter enabled by 2D WSe2 electrostatically-doped reconfigurable transistors. In 2018 76th Device Research Conference (DRC) (pp. 1-2). IEEE.
- Resta, G.V., Balaji, Y., Lin, D., Radu, I.P., Catthoor, F., Gaillardon, P.E. and De Micheli, G., 2018. Doping-Free Complementary Logic Gates Enabled by Two-Dimensional Polarity-Controllable Transistors. ACS nano, 12(7), pp.7039-7047 (2018).
- Resta, G.V., Gonzalez, J.R., Balaji, Y., Agarwal, T., Lin, D., Catthor, F., Radu, I.P., De Micheli, G. and Gaillardon, P.E., 2018, March. Towards high-performance polarity-controllable FETs with 2D materials. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018 (pp. 637-641). IEEE.
- Resta, G.V., Gaillardon, P.E. and De Micheli, G., 2019. Functionality-Enhanced Devices: From Transistors to Circuit-Level Opportunities. In Beyond-CMOS Technologies for Next Generation Computer Design(pp. 21-42). Springer, Cham. (2019).