Design and Implementation of a Video Coding Application on FPGA using Advanced Logic Synthesis Techniques

***Archived: This is a past project,  it is not on offer at the moment!***

**** Semester Project ****


Contact: Mr. Luca Amaru, PhD Student
               Dr. Pierre-Emmanuel Gaillardon, Post-doctoral Researcher

Project Background:

Source coding techniques are of paramount importance in video applications. For performance reasons,   such algorithms are mostly realized in hardware. In this scenario, synthesis tools are pushed to their limits  to meet the ever-­increasing demand of low-­power high-­quality video systems. The rise of novel synthesis techniques opens the opportunity to attain new levels of efficiency in hardware video coding applications.

Project Overview:

In this project, we want to design and implement an H.264/AVC video codec on modern FPGAs, using standard and novel logic synthesis tools in conjunction. Novel synthesis techniques, developed at the Integrated Systems Laboratory, will operate on critical blocks of the system to optimize further the performance. Traditional commercial flow will then be used to map the design on a state-of-the art FPGA.

A physical video demonstration of the designed H.264/AVC system on FPGA will conclude the  project.

Eligibility Requirements:

  • Good background in digital design
  • Good background in logic synthesis
  • Proficiency in VHDL, Verilog, C/C++
  • Knowledge of FPGA systems
  • Prior experience with video coding applications is a plus

***Archived: This is a past project,  it is not on offer at the moment!***